Tang Primer 20K
Tang Primer 20K is a core board with DDR3 sodimm shape based on GW2A-V18PG256C8IC8I7 as the main chip, with 2 ext-boards are prepared, the Dock and the Lite.
|Memory||128M DDR3||13Row x 10Col x 8banks x 16bits|
|Flash||32Mbits NOR Flash||W25Q32JVS|
|Debugger||Jtag + Uart||JST SH1.0 8Pins connector|
|SD card slot||1||Push-pull type|
|Display||8Pins spi lcd connector|
Comparison between ext-board
Dock ext-board appearance
The corresponding pins numbering of LED2 and LED3 is N16 and N14. See the mark on left of the right picture.
Lite ext-board appearance
The corresponding pin numbering between R8 and P9 is P8. See the mark on the top left of the right picture.
Comparison between peripherals of ext-board
|RGB Interface||1||RGB565 40P FPC Connector|
|DVP Interface||1||24P FPC Connector|
|Mic array Interface||1||10P FPC Connector|
|Touch Interface||1||4P FPC Connector|
|3.5mm headphone Jack||1||LPA4809MSF driver|
|DIP switch||1||5P DIP switch|
|Slide switch||1||Switch USB function||2|
|Type-C||USB-JTAG&UART||1||Onboard BL702 used to download bitstream file and provide serial communication|
|User-defined USB||1||USB3317 with Slide switch to change USB Interface function|
|Wireless antenna||1||BL702 wireless function|
|Key||6||One used for burning BL702,
five for Users
Install IDE ->
Learn coding programmer ->
Read Tutorial ->
Program by yourself ->
Read more official documents
Install IDE: Click me.
Visit Start to use to avoid some problems, and we can start coding for FPGA there.
After coding for FPGA, if you think it difficult, here we collect some useful learning resource.
If you have trouble using IDE, we have packed all documents about IDE, visit Download station and download what you need.
Reference examples summary
- Lite ext-board blink ：Click me
- Dock ext-board blink : Click me
- Reddit : reddit.com/r/GowinFPGA/
- Telegram : t.me/sipeed
- Leave message in the end of this page
- Business email : firstname.lastname@example.org
The default bank voltage of bank 0、bank 1、bank 7 on the core board is 3.3V, so their bank IO voltage is 3.3V output. If you want to custom the input IO bank voltage, please remove R5 and R9, see Assembly Click me to see where is R5 and R9.
And the corresponding golden finger on core board are as following:
Dock ext-board not work
For 20K Dock kits, it's necessary to enable the core board before using debugger debug the chip, just put the 1 switch on the dip switch down, otherwise LED0 and LED1 are on and core board dose not work.
|Enable Core Board||Disable state||Additional comments|
|When disabled, the LDE0 and LED1 is on, and core board doesn't work.|
How to burn into flash
Do following configurations:
No reaction after burning or phenomenon is wrong
Make sure you hace selected right device, and all parameters are the same as following.
Then make sure your code logic is right and your
Successfully burned once, but can't burn after that
Note that the description is there was a successful Flash burnt one time.
In this case, the default reason is that the wrong Dual-Purpose pin is enabled and the debugger can no longer scan the FPGA's JTAG. You can short pin 1 and pin 4 of Flash, by which the chip cannot read FLASH normally when it is powered on.
Besides, if you have dock ext-board, this can be solved by the enable pin of dip switch. Here art the steps
Firstlt, enable the core board, put the 1 switch on the dip switch down, then do something (like burnning fpga or erasing FPGA) in Programmer application, when the progress bar shows, switch the 1 switch on the dip switch up and down, after which you will find the progress bar works and finish your operations on fpga.
|Enable the core board first|
|Do operation on board, when progress bar shows, switch the 1 switch on the dip switch up and down|
|put the 1 switch on the dip switch up and down|
|Progress bar works and finish your operations on fpga|